default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDHaralampos-G. D. Stratigopoulos
Haralampos-G. Stratigopoulos
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
[j38]Wenzhe Guo
, Kuilian Yang, Haralampos-G. Stratigopoulos, Hassan Aboushady, Khaled Nabil Salama:
An End-To-End Neuromorphic Radio Classification System With an Efficient Sigma-Delta-Based Spike Encoding Scheme. IEEE Trans. Artif. Intell. 5(4): 1869-1881 (2024)- [c80]Hassan Aboushady, Noemie Beringuier-Boher, Kelly Burke, Philippe Dallemagne, Mario De Biase, Manuel Di Frangia, Virginie Deniau, Enrico Ferrari, Christophe Gaquière, Dominique Morche, Fabio Patrone, Stefano Pesci, Luigi Pomante, Andries Stam, Vincenzo Stornelli, Haralampos-G. Stratigopoulos, Mottaqiallah Taouil, Emmanuel Vaumorin, Jonathan Villain, Sander Steeghs:
Trusted SMEs for Sustainable Growth of Europeans Economical Backbone to Strengthen the Digital Sovereignty: The KDT Resilient Trust Project. DSD 2024: 620-627 - [c79]Alán Rodrigo Díaz Rizo, Abdelrahman Emad Abdelazim, Hassan Aboushady, Haralampos-G. Stratigopoulos:
Covert Communication Channels Based On Hardware Trojans: Open-Source Dataset and AI-Based Detection. HOST 2024: 101-106 - [c78]A. Sayed, Michel Vasilevski, M. T. Abdelmomen, Shadi Turk, Ahmed A. Ghoniem, C. Perez, C. Voillequin, Haralampos-G. Stratigopoulos, Marie-Minerve Louërat, E. Wantiez, Hassan Aboushady:
A 10.8GS/s, 84MHz-BW RF Bandpass ΣΔ ADC with a 89dB-SFDR and a 62dB-SNDR for LTE/5G Receivers. VLSI Technology and Circuits 2024: 1-2 - [c77]N. Afroz, A. Sayem, Georgios Volanis, Dzmitry Maliuk, Haralampos-G. Stratigopoulos, Yiorgos Makris:
On the Sensitivity of Analog Artificial Neural Network Models to Process Variation. VTS 2024: 1-7 - [i1]Theofilos Spyrou, Said Hamdioui, Haralampos-G. Stratigopoulos:
SpikeFI: A Fault Injection Framework for Spiking Neural Networks. CoRR abs/2412.06795 (2024) - 2023
- [j37]Fei Su, Chunsheng Liu, Haralampos-G. Stratigopoulos:
Special Issue on Testability and Dependability of Artificial Intelligence Hardware. IEEE Des. Test 40(2): 5-7 (2023) - [j36]Fei Su, Chunsheng Liu, Haralampos-G. Stratigopoulos:
Testability and Dependability of AI Hardware: Survey, Trends, Challenges, and Perspectives. IEEE Des. Test 40(2): 8-58 (2023) - [j35]Sarah A. El-Sayed, Theofilos Spyrou, Luis A. Camuñas-Mesa, Haralampos-G. Stratigopoulos:
Compact Functional Testing for Neuromorphic Computing Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2391-2403 (2023) - [j34]Alán Rodrigo Díaz Rizo, Hassan Aboushady, Haralampos-G. Stratigopoulos:
Anti-Piracy Design of RF Transceivers. IEEE Trans. Circuits Syst. I Regul. Pap. 70(1): 492-505 (2023) - [j33]Alán Rodrigo Díaz Rizo, Hassan Aboushady, Haralampos-G. Stratigopoulos:
Leaking Wireless ICs via Hardware Trojan-Infected Synchronization. IEEE Trans. Dependable Secur. Comput. 20(5): 3845-3859 (2023) - [c76]Haralampos-G. Stratigopoulos, Theofilos Spyrou, Spyridon Raptis:
Testing and Reliability of Spiking Neural Networks: A Review of the State-of-the-Art. DFT 2023: 1-8 - [c75]Theofilos Spyrou, Haralampos-G. Stratigopoulos:
On-Line Testing of Neuromorphic Hardware. ETS 2023: 1-6 - 2022
- [j32]Julian Leonhard, Nimisha Limaye, Shadi Turk, Alhassan Sayed, Alán Rodrigo Díaz Rizo, Hassan Aboushady, Ozgur Sinanoglu, Haralampos-G. Stratigopoulos:
Digitally Assisted Mixed-Signal Circuit Security. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(8): 2449-2462 (2022) - [j31]Mohamed Elshamy, Giorgio Di Natale, Alhassan Sayed, Antonios Pavlidis, Marie-Minerve Louërat, Hassan Aboushady, Haralampos-G. Stratigopoulos:
Digital-to-Analog Hardware Trojan Attacks. IEEE Trans. Circuits Syst. I Regul. Pap. 69(2): 573-586 (2022) - [j30]Alán Rodrigo Díaz Rizo, Julian Leonhard, Hassan Aboushady, Haralampos-G. Stratigopoulos:
RF Transceiver Security Against Piracy Attacks. IEEE Trans. Circuits Syst. II Express Briefs 69(7): 3169-3173 (2022) - [c74]Mariam Tlili, Alhassan Sayed, Doaa Mahmoud, Marie-Minerve Louërat, Hassan Aboushady, Haralampos-G. Stratigopoulos:
Anti-Piracy of Analog and Mixed-Signal Circuits in FD-SOI. ASP-DAC 2022: 423-428 - [c73]Theofilos Spyrou, Sarah A. El-Sayed, Engin Afacan, Luis A. Camuñas-Mesa, Bernabé Linares-Barranco, Haralampos-G. Stratigopoulos:
Reliability Analysis of a Spiking Neural Network Hardware Accelerator. DATE 2022: 370-375 - [c72]Alán Rodrigo Díaz Rizo, Hassan Aboushady, Haralampos-G. Stratigopoulos:
SyncLock: RF Transceiver Security Using Synchronization Locking. DATE 2022: 1153-1156 - [c71]Michele Portolan, Antonios Pavlidis, Giorgio Di Natale, Eric Faehn, Haralampos-G. Stratigopoulos:
Circuit-to-Circuit Attacks in SoCs via Trojan-Infected IEEE 1687 Test Infrastructure. ITC 2022: 539-543 - [c70]Antonios Pavlidis, Eric Faehn, Marie-Minerve Louërat, Haralampos-G. Stratigopoulos:
Run-Time Hardware Trojan Detection in Analog and Mixed-Signal ICs. VTS 2022: 1-8 - 2021
- [j29]Julian Leonhard, Alhassan Sayed, Marie-Minerve Louërat, Hassan Aboushady, Haralampos-G. D. Stratigopoulos:
Analog and Mixed-Signal IC Security via Sizing Camouflaging. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(5): 822-835 (2021) - [j28]Antonios Pavlidis, Marie-Minerve Louërat, Eric Faehn, Anand Kumar, Haralampos-G. Stratigopoulos:
SymBIST: Symmetry-Based Analog and Mixed-Signal Built-In Self-Test for Functional Safety. IEEE Trans. Circuits Syst. I Regul. Pap. 68(6): 2580-2593 (2021) - [j27]Mohamed Elshamy, Alhassan Sayed, Marie-Minerve Louërat, Hassan Aboushady, Haralampos-G. Stratigopoulos:
Locking by Untuning: A Lock-Less Approach for Analog and Mixed-Signal IC Security. IEEE Trans. Very Large Scale Integr. Syst. 29(12): 2130-2142 (2021) - [c69]Julian Leonhard, Mohamed Elshamy, Marie-Minerve Louërat, Haralampos-G. D. Stratigopoulos:
Breaking Analog Biasing Locking Techniques via Re-Synthesis. ASP-DAC 2021: 555-560 - [c68]Theofilos Spyrou, Sarah A. El-Sayed, Engin Afacan, Luis A. Camuñas-Mesa, Bernabé Linares-Barranco, Haralampos-G. Stratigopoulos:
Neuron Fault Tolerance in Spiking Neural Networks. DATE 2021: 743-748 - [c67]Antonios Pavlidis, Eric Faehn, Marie-Minerve Louërat, Haralampos-G. Stratigopoulos:
BIST-Assisted Analog Fault Diagnosis. ETS 2021: 1-6 - [c66]Mohamed Elshamy, Haralampos-G. Stratigopoulos:
Neuron-PUF: Physical Unclonable Function Based on a Single Spiking Neuron. IOLTS 2021: 1-6 - 2020
- [c65]Mohamed Elshamy, Alhassan Sayed, Marie-Minerve Louërat, Amine Rhouni, Hassan Aboushady, Haralampos-G. D. Stratigopoulos:
Securing Programmable Analog ICs Against Piracy. DATE 2020: 61-66 - [c64]Antonios Pavlidis, Marie-Minerve Louërat, Eric Faehn, Anand Kumar, Haralampos-G. D. Stratigopoulos:
Symmetry-based A/M-S BIST (SymBIST): Demonstration on a SAR ADC IP. DATE 2020: 282-285 - [c63]Mohamed Elshamy, Giorgio Di Natale, Antonios Pavlidis, Marie-Minerve Louërat, Haralampos-G. D. Stratigopoulos:
Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access Mechanism. ETS 2020: 1-6 - [c62]Sarah A. El-Sayed, Theofilos Spyrou, Antonios Pavlidis, Engin Afacan, Luis A. Camuñas-Mesa, Bernabé Linares-Barranco, Haralampos-G. D. Stratigopoulos:
Spiking Neuron Hardware-Level Fault Modeling. IOLTS 2020: 1-4
2010 – 2019
- 2019
- [c61]Julian Leonhard, Muhammad Yasin, Shadi Turk, Mohammed Thari Nabeel, Marie-Minerve Louërat, Roselyne Chotin-Avot, Hassan Aboushady, Ozgur Sinanoglu, Haralampos-G. D. Stratigopoulos:
MixLock: Securing Mixed-Signal Circuits via Logic Locking. DATE 2019: 84-89 - [c60]Sarah A. El-Sayed, Luis A. Camuñas-Mesa, Bernabé Linares-Barranco, Haralampos-G. D. Stratigopoulos:
Self-Testing Analog Spiking Neuron Circuit. SMACD 2019: 81-84 - [c59]Julian Leonhard, Marie-Minerve Louërat, Hassan Aboushady, Ozgur Sinanoglu, Haralampos-G. D. Stratigopoulos:
Mixed-Signal Hardware Security Using MixLock: Demonstration in an Audio Application. SMACD 2019: 185-188 - [c58]Ghada Sokar, Yassin Zakaria, Asmaa Rabie, Kareem Madkour, Ira Leventhal, Jochen Rivoir, Xinli Gu, Haralampos-G. D. Stratigopoulos:
IP Session on Machine Learning Applications in IC Test-Related Tasks. VTS 2019: 1 - 2018
- [j26]Haralampos-G. D. Stratigopoulos, Christian Streitwieser:
Adaptive Test With Test Escape Estimation for Mixed-Signal ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 2125-2138 (2018) - [c57]Haralampos-G. D. Stratigopoulos:
Machine learning applications in IC testing. ETS 2018: 1-10 - [c56]Naohiko Shimizu, Junichi Akita, Marie-Minerve Louërat, Haralampos-G. D. Stratigopoulos, Jean-Paul Chaput, Dimitri Galayko:
Open Source Hardware and EDA Tools for Analog/Mixed-Signal Design and Prototyping. ISCAS 2018: 1-5 - [c55]Yiorgos Makris, Amit Nahar, Haralampos-G. D. Stratigopoulos, Marc Hutner:
Special session on machine learning: How will machine learning transform test? VTS 2018: 1 - 2017
- [j25]Maria K. Michael, Haralampos-G. D. Stratigopoulos:
Recap of the European Test Symposium 2017 (ETS'17). IEEE Des. Test 34(6): 119-120 (2017) - [j24]Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Ke Huang, Amit Nahar, Bob Orr, Michael Pas, John M. Carulli, Yiorgos Makris:
Yield Forecasting Across Semiconductor Fabrication Plants and Design Generations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(12): 2120-2133 (2017) - [c54]Maria K. Michael, Rolf Drechsler, Stephan Eggersglüß, Haralampos-G. D. Stratigopoulos, Sybille Hellebrand, Rob Aitken:
Foreword. ETS 2017: 1-2 - [c53]Haralampos-G. D. Stratigopoulos, Christian Streitwieser:
Adaptive test flow for mixed-signal ICs. VTS 2017: 1-6 - 2016
- [j23]Nicola Nicolici, Haralampos-G. D. Stratigopoulos:
Guest Editors' Introduction: Top Papers from the 2015 International Test Conference. IEEE Des. Test 33(6): 5-6 (2016) - [j22]Manuel J. Barragán, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Le Gall, Neha Bhargava, Ankur Bal:
Practical Simulation Flow for Evaluating Analog/Mixed-Signal Test Techniques. IEEE Des. Test 33(6): 46-54 (2016) - [j21]Guillaume Renaud, Manuel J. Barragán, Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Le Gall, Hervé Naudet:
A 65nm CMOS Ramp Generator Design and its Application Towards a BIST Implementation of the Reduced-Code Static Linearity Test Technique for Pipeline ADCs. J. Electron. Test. 32(4): 407-421 (2016) - [j20]Manuel J. Barragán, Rshdee Alhakim, Haralampos-G. D. Stratigopoulos, Matthieu Dubois, Salvador Mir, Hervé Le Gall, Neha Bhargava, Ankur Bal:
A Fully-Digital BIST Wrapper Based on Ternary Test Stimuli for the Dynamic Test of a 40 nm CMOS 18-bit Stereo Audio ΣΔ ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(11): 1876-1888 (2016) - [j19]Martin Andraud, Haralampos-G. D. Stratigopoulos, Emmanuel Simeu:
One-Shot Non-Intrusive Calibration Against Process Variations for Analog/RF Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(11): 2022-2035 (2016) - [c52]Athanasios Dimakos, Haralampos-G. D. Stratigopoulos, Alexandre Siligaris, Salvador Mir, Emeric de Foucauld:
Built-in test of millimeter-Wave circuits based on non-intrusive sensors. DATE 2016: 505-510 - [c51]Said Hamdioui, Giorgio Di Natale, Bram Kruseman, Maria K. Michael, Haralampos-G. D. Stratigopoulos:
ETS 2016 foreword. ETS 2016: 1 - [c50]Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris:
Harnessing fabrication process signature for predicting yield across designs. ISCAS 2016: 898-901 - 2015
- [j18]Athanasios Dimakos, Haralampos-G. D. Stratigopoulos, Alexandre Siligaris, Salvador Mir, Emeric de Foucauld:
Parametric Built-In Test for 65nm RF LNA Using Non-Intrusive Variation-Aware Sensors. J. Electron. Test. 31(4): 381-394 (2015) - [j17]Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Naudet:
Exploiting Pipeline ADC Properties for a Reduced-Code Linearity Test Technique. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(10): 2391-2400 (2015) - [c49]John Liaperdos, Haralampos-G. D. Stratigopoulos, Louay Abdallah, Yiorgos Tsiatouhas, Angela Arapoyanni, Xin Li:
Fast deployment of alternate analog test using Bayesian model fusion. DATE 2015: 1030-1035 - [c48]Hervé Le Gall, Rshdee Alhakim, Miroslav Valka, Salvador Mir, Haralampos-G. D. Stratigopoulos, Emmanuel Simeu:
High frequency jitter estimator for SoCs. ETS 2015: 1-6 - [c47]Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris:
Yield Forecasting in Fab-to-Fab Production Migration Based on Bayesian Model Fusion. ICCAD 2015: 9-14 - [c46]Athanasios Dimakos, Martin Andraud, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Emmanuel Simeu, Salvador Mir:
Test and Calibration of RF Circuits Using Built-in Non-intrusive Sensors. ISVLSI 2015: 627 - [c45]Haralampos-G. D. Stratigopoulos, Manuel J. Barragán, Salvador Mir, Hervé Le Gall, Neha Bhargava, Ankur Bal:
Evaluation of low-cost mixed-signal test techniques for circuits with long simulation times. ITC 2015: 1-7 - 2014
- [j16]Haralampos-G. D. Stratigopoulos, Stephen Sunter:
Fast Monte Carlo-Based Estimation of Analog Parametric Test Metrics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(12): 1977-1990 (2014) - [c44]Martin Andraud, Haralampos-G. D. Stratigopoulos, Emmanuel Simeu:
One-Shot Calibration of RF Circuits Based on Non-Intrusive Sensors. DAC 2014: 10:1-10:2 - [c43]Ayssar Serhan, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir:
Low-cost EVM built-in test of RF transceivers. IDT 2014: 51-54 - [c42]Martin Andraud, Anthony Deluthault, Mouhamadou Dieng, Florence Azaïs, Serge Bernard, Philippe Cauvet, Mariane Comte, Thibault Kervaon, Vincent Kerzerho, Salvador Mir, Paul-Henri Pugliesi-Conti, Michel Renovell, Fabien Soulier, Emmanuel Simeu, Haralampos-G. D. Stratigopoulos:
Solutions for the self-adaptation of communicating systems in operation. IOLTS 2014: 234-239 - [c41]Josep Altet, Eduardo Aldrete-Vidrio, Ferran Reverter, Didac Gómez, José Luis González, Marvin Onabajo, José Silva-Martínez, B. Martineau, X. Perpiñà, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Xavier Aragonès, Xavier Jordà, Miquel Vellvehí, Stefan Dilhaire, Salvador Mir, Diego Mateo:
Review of temperature sensors as monitors for RF-MMW built-in testing and self-calibration schemes. MWSCAS 2014: 1081-1084 - [c40]Matthieu Dubois, Haralampos-G. D. Stratigopoulos, Salvador Mir, Manuel J. Barragán:
Evaluation of digital ternary stimuli for dynamic test of ΣΔ ADCs. VLSI-SoC 2014: 1-6 - [c39]Matthieu Dubois, Haralampos-G. D. Stratigopoulos, Salvador Mir, Manuel J. Barragán:
Statistical Evaluation of Digital Techniques for $\sum\varDelta$ ADC BIST. VLSI-SoC (Selected Papers) 2014: 129-148 - [c38]Haralampos-G. D. Stratigopoulos, Stephen Sunter:
Efficient Monte Carlo-based analog parametric fault modelling. VTS 2014: 1-6 - 2013
- [j15]Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Naudet, Gerard Bret:
Reduced-Code Linearity Testing of Pipeline ADCs. IEEE Des. Test 30(6): 80-88 (2013) - [c37]Haralampos-G. D. Stratigopoulos, Pierre Faubet, Yoann Courant, Firas Mohamed:
Multidimensional analog test metrics estimation using extreme value theory and statistical blockade. DAC 2013: 72:1-72:7 - [c36]Ke Huang, Haralampos-G. D. Stratigopoulos, Louay Abdallah, Salvador Mir, Ahcène Bounceur:
Multivariate statistical techniques for analog parametric test metrics estimation. DTIS 2013: 6-11 - [c35]Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir:
True non-intrusive sensors for RF built-in test. ITC 2013: 1-10 - [c34]Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir:
Fault modeling and diagnosis for nanometric analog circuits. ITC 2013: 1-10 - [c33]Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Josep Altet:
Defect-oriented non-intrusive RF test using on-chip temperature sensors. VTS 2013: 1-6 - [c32]Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Naudet, Gerard Bret:
Reduced code linearity testing of pipeline adcs in the presence of noise. VTS 2013: 1-6 - 2012
- [j14]Haralampos-G. D. Stratigopoulos, Salvador Mir:
Adaptive Alternate Analog Test. IEEE Des. Test Comput. 29(4): 71-79 (2012) - [j13]Haralampos-G. D. Stratigopoulos, Alberto Valdes-Garcia:
Guest Editors' Introduction: Digitally Enhanced Wireless Transceivers. IEEE Des. Test Comput. 29(6): 5-6 (2012) - [j12]Haralampos-G. D. Stratigopoulos:
Test Metrics Model for Analog Test Development. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(7): 1116-1128 (2012) - [j11]Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir, Camelia Hora, Yizi Xing, Bram Kruseman:
Diagnosis of Local Spot Defects in Analog Circuits. IEEE Trans. Instrum. Meas. 61(10): 2701-2712 (2012) - [c31]Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Josep Altet:
Testing RF circuits with true non-intrusive built-in sensors. DATE 2012: 1090-1095 - [c30]Dimitri de Jonghe, Elie Maricau, Georges G. E. Gielen, Trent McConaghy, Bratislav Tasic, Haralampos-G. D. Stratigopoulos:
Advances in variation-aware modeling, verification, and testing of analog ICs. DATE 2012: 1615-1620 - [c29]Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Naudet, Christophe Forel:
Enhanced reduced code linearity test technique for multi-bit/stage pipeline ADCs. ETS 2012: 1-6 - [c28]Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Christophe Kelma:
Experiences with non-intrusive sensors for RF built-in test. ITC 2012: 1-8 - 2011
- [j10]Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Christophe Kelma:
RF Front-End Test Using Built-in Sensors. IEEE Des. Test Comput. 28(6): 76-84 (2011) - [j9]Haralampos-G. D. Stratigopoulos, Krishnendu Chakrabarty:
Guest Editorial. J. Electron. Test. 27(3): 223 (2011) - [j8]Ahcène Bounceur, Salvador Mir, Haralampos-G. D. Stratigopoulos:
Estimation of Analog Parametric Test Metrics Using Copulas. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(9): 1400-1410 (2011) - [c27]Alexios Spyronasios, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir:
On Replacing an RF Test with an Alternative Measurement: Theory and a Case Study. Asian Test Symposium 2011: 365-370 - [c26]Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir:
Implicit test of high-speed analog circuits using non-intrusive sensors. ECCTD 2011: 652 - [c25]Nathan Kupp, Haralampos-G. D. Stratigopoulos, Petros Drineas, Yiorgos Makris:
On proving the efficiency of alternative RF tests. ICCAD 2011: 762-767 - 2010
- [j7]Haralampos-G. D. Stratigopoulos, Petros Drineas, Mustapha Slamani, Yiorgos Makris:
RF Specification Test Compaction Using Learning Machines. IEEE Trans. Very Large Scale Integr. Syst. 18(6): 998-1002 (2010) - [c24]Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir:
Bayesian Fault Diagnosis of RF Circuits Using Nonparametric Density Estimation. Asian Test Symposium 2010: 295-298 - [c23]Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir:
Fault diagnosis of analog circuits based on machine learning. DATE 2010: 1761-1766 - [c22]Louay Abdallah, Haralampos-G. D. Stratigopoulos, Christophe Kelma, Salvador Mir:
Sensors for built-in alternate RF test. ETS 2010: 49-54 - [c21]Haralampos-G. D. Stratigopoulos, Salvador Mir, Erkan Acar, Sule Ozev:
Defect filter for alternate RF test. ETS 2010: 265-270 - [c20]Haralampos-G. D. Stratigopoulos, Salvador Mir:
Analog test metrics estimates with PPM accuracy. ICCAD 2010: 241-247 - [c19]Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
An analog VLSI multilayer perceptron and its application towards built-in self-test in analog circuits. IOLTS 2010: 71-76 - [c18]Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, He Huang, Yiorgos Makris:
Analog neural network design for RF built-in self-test. ITC 2010: 684-693 - [c17]Salvador Mir, Haralampos-G. D. Stratigopoulos, Ahcène Bounceur:
Density estimation for analog/RF test problem solving. VTS 2010: 41 - [c16]Haralampos-G. D. Stratigopoulos:
Special session 4C: Thesis research poster session. VTS 2010: 131 - [c15]Haralampos-G. D. Stratigopoulos:
Special session 8A: TTTC 2010 E. J. McCluskey Best Doctoral Thesis Award. VTS 2010: 257 - [c14]Haralampos-G. D. Stratigopoulos:
Special session 12A: Panel adaptive analog test: Feasibility and opportunities ahead. VTS 2010: 353
2000 – 2009
- 2009
- [j6]Haralampos-G. D. Stratigopoulos, Salvador Mir, Ahcène Bounceur:
Evaluation of Analog/RF Test Measurements at the Design Stage. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(4): 582-590 (2009) - [c13]Haralampos-G. D. Stratigopoulos, Salvador Mir, Yiorgos Makris:
Enrichment of limited training sets in machine-learning-based analog/RF test. DATE 2009: 1668-1673 - [c12]Haralampos-G. D. Stratigopoulos, Salvador Mir, Erkan Acar, Sule Ozev:
Defect Filter for Alternate RF Test. ETS 2009: 101-106 - [c11]Matthieu Dubois, Haralampos-G. D. Stratigopoulos, Salvador Mir:
Hierarchical parametric test metrics estimation: A ΣΔ converter BIST case study. ICCD 2009: 78-83 - [c10]Yiorgos Makris, Haralampos-G. D. Stratigopoulos:
Special Session 7C: TTTC 2009 Best Doctoral Thesis Contest. VTS 2009: 233 - 2008
- [j5]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
Error Moderation in Low-Cost Machine-Learning-Based Analog/RF Testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(2): 339-351 (2008) - [c9]Haralampos-G. D. Stratigopoulos, Jeanne Tongbong, Salvador Mir:
A General Method to Evaluate RF BIST Techniques Based on Non-parametric Density Estimation. DATE 2008: 68-73 - [c8]James Dardig, Haralampos-G. D. Stratigopoulos, Eric Stern, Mark A. Reed, Yiorgos Makris:
A Statistical Approach to Characterizing and Testing Functionalized Nanowires. VTS 2008: 267-274 - 2007
- [c7]Haralampos-G. D. Stratigopoulos, Petros Drineas, Mustapha Slamani, Yiorgos Makris:
Non-RF to RF Test Correlation Using Learning Machines: A Case Study. VTS 2007: 9-14 - 2006
- [j4]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
An adaptive checker for the fully differential analog code. IEEE J. Solid State Circuits 41(6): 1421-1429 (2006) - [j3]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
Concurrent detection of erroneous responses in linear analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(5): 878-891 (2006) - [c6]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
Bridging the Accuracy of Functional and Machine-Learning-Based Mixed-Signal Testing. VTS 2006: 406-411 - 2005
- [j2]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
Nonlinear decision boundaries for testing analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(11): 1760-1773 (2005) - [c5]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
Generating decision regions in analog measurement spaces. ACM Great Lakes Symposium on VLSI 2005: 88-91 - [c4]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
Constructive Derivation of Analog Specification Test Criteria. VTS 2005: 395-400 - 2004
- [j1]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
An Analog Checker with Input-Relative Tolerance for Duplicate Signals. J. Electron. Test. 20(5): 479-488 (2004) - 2003
- [c3]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
An Analog Checker With Input-Relative Tolerance for Duplicate Signals. IOLTS 2003: 54- - [c2]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
Concurrent Error Detection in Linear Analog Circuits Using State Estimation. ITC 2003: 1164-1173 - [c1]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
An Analog Checker with Dynamically Adjustable Error Threshold for Fully Differential Circuits. VTS 2003: 209-218
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2025-03-04 21:17 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
