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ORCIDTimothy Kam
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2010 – 2019
- 2012
[c20]Inkwon Hwang, Timothy Kam, Massoud Pedram:
A study of the effectiveness of CPU consolidation in a virtualized multi-core server system. ISLPED 2012: 339-344- [c19]Ümit Y. Ogras
, Yunus Emre, Jianping Xu, Timothy Kam, Michael Kishinevsky:
Energy-guided exploration of on-chip network design for exa-scale computing. SLIP 2012: 24-31 - 2011
- [j6]Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-Lien Lu:
Automatic Pipelining From Transactional Datapath Specifications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(3): 441-454 (2011) - [c18]Raid Zuhair Ayoub, Ümit Y. Ogras, Eugene Gorbatov, Yanqin Jin, Timothy Kam, Paul Diefenbaugh, Tajana Rosing:
OS-level power minimization under tight performance constraints in general purpose systems. ISLPED 2011: 321-326 - [c17]Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-Lien Lu:
Integrating formal verification and high-level processor pipeline synthesis. SASP 2011: 22-29 - 2010
- [c16]Eriko Nurvitadhi, James C. Hoe, Shih-Lien Lu, Timothy Kam:
Automatic multithreaded pipeline synthesis from transactional datapath specifications. DAC 2010: 314-319 - [c15]Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-Lien Lu:
Automatic pipelining from transactional datapath specifications. DATE 2010: 1001-1004
2000 – 2009
- 2008
- [c14]Timothy Kam, Michael Kishinevsky, Jordi Cortadella, Marc Galceran Oms:
Correct-by-construction microarchitectural pipelining. ICCAD 2008: 434-441 - [c13]Steve Haynal, Timothy Kam, Michael Kishinevsky, Emily Shriver, Xinning Wang:
A System Verilog Rewriting System for RTL Abstraction with Pentium Case Study. MEMOCODE 2008: 79-88 - 2006
- [j5]Satrajit Chatterjee, Alan Mishchenko, Robert K. Brayton, Xinning Wang, Timothy Kam:
Reducing Structural Bias in Technology Mapping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12): 2894-2903 (2006) - 2005
- [c12]Satrajit Chatterjee, Alan Mishchenko, Robert K. Brayton, Xinning Wang, Timothy Kam:
Reducing structural bias in technology mapping. ICCAD 2005: 519-526 - 2003
- [c11]Alan Mishchenko, Xinning Wang, Timothy Kam:
A new enhanced constructive decomposition and mapping algorithm. DAC 2003: 143-148 - 2002
- [c10]Sumit Gupta, Nick Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau, Timothy Kam, Michael Kishinevsky, Shai Rotem:
Coordinated transformations for high-level synthesis of high performance microprocessor blocks. DAC 2002: 898-903
1990 – 1999
- 1999
- [c9]Yatin Vasant Hoskote, Timothy Kam, Pei-Hsin Ho, Xudong Zhao:
Coverage Estimation for Symbolic Model Checking. DAC 1999: 300-305 - 1998
- [c8]Pei-Hsin Ho, Adrian J. Isles, Timothy Kam:
Formal verification of pipeline control using controlled token nets and abstract interpretation. ICCAD 1998: 529-536 - 1997
- [j4]Timothy Kam, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
Implicit computation of compatible sets for state minimization of ISFSMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(7): 657-676 (1997) - [j3]Tiziano Villa, Timothy Kam, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
Explicit and implicit algorithms for binate covering problems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(7): 677-691 (1997) - [j2]Timothy Kam, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
Theory and algorithms for state minimization of nondeterministic FSMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(11): 1311-1322 (1997) - 1996
- [c7]Yirng-An Chen, Edmund M. Clarke, Pei-Hsin Ho, Yatin Vasant Hoskote, Timothy Kam, Manpreet Khaira, John W. O'Leary, Xudong Zhao:
Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking. FMCAD 1996: 19-33 - 1995
- [j1]Timothy Kam, P. A. Subrahmanyam:
Comparing layouts with HDL models: a formal verification technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(4): 503-509 (1995) - [c6]Timothy Kam, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
Implicit state minimization of non-deterministic FSMs. ICCD 1995: 250-257 - 1994
- [c5]Adnan Aziz, Felice Balarin, Szu-Tsung Cheng, Ramin Hojati, Timothy Kam, Sriram C. Krishnan, Rajeev K. Ranjan, Thomas R. Shiple, Vigyan Singhal, Serdar Tasiran, Huey-Yih Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
HSIS: A BDD-Based Environment for Formal Verification. DAC 1994: 454-459 - [c4]Timothy Kam, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
A Fully Implicit Algorithm for Exact State Minimization. DAC 1994: 684-690 - 1992
- [c3]Timothy Kam, P. A. Subrahmanyam:
State machine abstraction from circuit layouts using BDD's: applications in verification and synthesis. EURO-DAC 1992: 92-97 - [c2]Timothy Kam, P. A. Subrahmanyam:
Comparing Layouts with HDL Models: A Formal Verification Technique. ICCD 1992: 588-591 - 1990
- [c1]Arvind Srinivasan, Timothy Kam, Sharad Malik, Robert K. Brayton:
Algorithms for Discrete Function Manipulation. ICCAD 1990: 92-95
Coauthor Index
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