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2020 – today
- 2023
[c51]Ivo Bolsens:
Bridging Divides: Unifying AI Architectures from from Edge to Cloud. MLCAD 2023: 1- 2021
- [c50]Ivo Bolsens:
Scalable System and Silicon Architectures to Handle the Workloads of the Post-Moore Era. ISPD 2021: 53-54 - 2020
- [c49]Ivo Bolsens:
Scalable System and Silicon Architectures to Handle the Workloads of the Post-Moore Era. ISPD 2020: 1-2
2010 – 2019
- 2017
- [c48]Ivo Bolsens:
"All programmable FPGA, providing hardware efficiency to software programmers". FPL 2017: 1-3 - [c47]Ivo Bolsens:
Pushing the boundaries of Moore's Law to transition from FPGA to All Programmable Platform. ISPD 2017: 23 - 2014
- [c46]Ivo Bolsens, Georges G. E. Gielen
, Kaushik Roy, Ulf Schneider:
"All Programmable SOC FPGA for networking and computing in big data infrastructure". ASP-DAC 2014: 1-3 - 2010
- [c45]Ivo Bolsens:
FPGA platforms leading the way in the application of 'more than Moore's' technology. FPT 2010 - [c44]Ivo Bolsens:
Programming customized parallel architectures in FPGA. IPDPS Workshops 2010: 1
2000 – 2009
- 2009
- [c43]Ivo Bolsens:
NoCs: It is about the memory and the programming model. NOCS 2009: 1 - 2008
- [c42]Ivo Bolsens:
FPGA: The future platform for transforming, transporting and computing data. FPL 2008: 1 - 2005
- [c41]Jason Cong, Tony Ma, Ivo Bolsens, Phil Moorby, Jan M. Rabaey, John Sanguinetti, Kazutoshi Wakabayashi, Yoshi Watanabe:
Are we ready for system-level synthesis? ASP-DAC 2005 - [c40]Ivo Bolsens:
Plenary lecture [Second page is blank]. ECCTD 2005: 147-148 - 2004
- [c39]Nitin Deo, Behrooz Zahiri, Ivo Bolsens, Jason Cong, Bhusan Gupta, Philip Lopresti, Christopher B. Reynolds, Chris Rowen, Ray Simar:
What happened to ASIC?: Go (recon)figure? DAC 2004: 185 - 2003
- [j14]Bart Vanhoof, Lode Nachtergaele, Gauthier Lafruit, Mercedes Peón, Bart Masschelein, Francky Catthoor, Jan Bormans, Ivo Bolsens:
A scalable MPEG-4 wavelet-based visual texture compression system with optimized memory organization. IEEE Trans. Circuits Syst. Video Technol. 13(4): 348-357 (2003) - [c38]Abbas El Gamal, Ivo Bolsens, Andy Broom, Christopher Hamlin, Philippe Magarshack, Zvi Or-Bach, Lawrence T. Pileggi:
Fast, cheap and under control: the next implementation fabric. DAC 2003: 354-355 - [c37]Wolfgang Rosenstiel, Rudy Lauwereins, Ivo Bolsens, Chris Rowen, Yankin Tanurhan, Kees A. Vissers, S. Wang:
Panel Title: Reconfigurable Computing - Different Perspectives. DATE 2003: 10476-10477 - [c36]Ivo Bolsens:
Challenges and Opportunities for FPGA Programmable System Platforms. IOLTS 2003: 3 - 2002
- [c35]J. Bryan Lewis, Ivo Bolsens, Rudy Lauwereins, Chris Wheddon, Bhusan Gupta, Yankin Tanurhan:
Reconfigurable SoC - What Will it Look Like? DATE 2002: 660-662 - [c34]Steve Guccione, Diederik Verkest, Ivo Bolsens:
Design Technology for Networked Reconfigurable FPGA Platforms. DATE 2002: 994-997 - [c33]Ivo Bolsens:
Challenges and Opportunities for FPGA Platforms. FPL 2002: 391-392 - 2001
- [j13]Wolfgang Eberle, Veerle Derudder, Geert Vanwijnsberghe, Mario Vergara, Luc Deneire, Liesbet Van der Perre, Marc Engels, Ivo Bolsens, Hugo De Man:
80-Mb/s QPSK and 72-Mb/s 64-QAM flexible and scalable digital OFDM transceiver ASICs for wireless local area networks in the 5-GHz band. IEEE J. Solid State Circuits 36(11): 1829-1838 (2001) - [j12]Lode Nachtergaele, Toon Gijbels, Jan Bormans, Francky Catthoor, Ivo Bolsens:
Power and Speed-Efficient Code Transformation of Video Compression Algorithms for RISC Processors. J. VLSI Signal Process. 27(1-2): 161-169 (2001) - [c32]Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens:
Hardware/software partitioning of embedded system in OCAPI-xl. CODES 2001: 30-35 - [c31]Gerd Vandersteen, Piet Wambacq, Yves Rolain, Johan Schoukens, Stéphane Donnay, Marc Engels, Ivo Bolsens:
Efficient bit-error-rate estimation of multicarrier transceivers. DATE 2001: 164-168 - [c30]Mustafa Badaroglu, Marc van Heijningen, Vincent Gravot, Stéphane Donnay, Hugo De Man, Georges G. E. Gielen, Marc Engels, Ivo Bolsens:
High-level simulation of substrate noise generation from large digital circuits with multiple supplies. DATE 2001: 326-330 - 2000
- [j11]Marc van Heijningen, John Compiet, Piet Wambacq, Stéphane Donnay, Marc Engels, Ivo Bolsens:
Analysis and experimental verification of digital substrate noise generation for epi-type substrates. IEEE J. Solid State Circuits 35(7): 1002-1008 (2000) - [j10]Stéphane Donnay, Philip Pieters, Kristof Vaesen, Wim Diels, Piet Wambacq, Walter De Raedt, Eric Beyne, Marc Engels, Ivo Bolsens:
Chip-package codesign of a low-power 5-GHz RF front end. Proc. IEEE 88(10): 1583-1597 (2000) - [c29]Gerd Vandersteen, Piet Wambacq, Yves Rolain, Petr Dobrovolný, Stéphane Donnay, Marc Engels, Ivo Bolsens:
A methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers. DAC 2000: 440-445 - [c28]Marc van Heijningen, Mustafa Badaroglu, Stéphane Donnay, Marc Engels, Ivo Bolsens:
High-level simulation of substrate noise generation including power supply noise coupling. DAC 2000: 446-451 - [c27]Piet Wambacq, Petr Dobrovolný, Stéphane Donnay, Marc Engels, Ivo Bolsens:
Compact Modeling of Nonlinear Distortion in Analog Communication Circuits. DATE 2000: 350-354 - [c26]Kristof Denolf, Peter Vos, Jan Bormans, Ivo Bolsens:
Cost-Efficient C-Level Design of an MPEG-4 Video Decoder. PATMOS 2000: 233-242 - [e1]Ivo Bolsens:
2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France. IEEE Computer Society / ACM 2000, ISBN 0-7695-0537-6 [contents]
1990 – 1999
- 1999
- [j9]Gauthier Lafruit, Lode Nachtergaele, Jan Bormans, Marc Engels, Ivo Bolsens:
Optimal memory organization for scalable texture codecs in MPEG-4. IEEE Trans. Circuits Syst. Video Technol. 9(2): 218-243 (1999) - [j8]Bart Vanhoof, Mercedes Peón, Gauthier Lafruit, Jan Bormans, Lode Nachtergaele, Ivo Bolsens:
A Scalable Architecture for MPEG-4 Wavelet Quantization. J. VLSI Signal Process. 23(1): 93-107 (1999) - [c25]Bart Vanhoof, Mercedes Peón, Gauthier Lafruit, Jan Bormans, Marc Engels, Ivo Bolsens:
A scalable architecture for MPEG-4 embedded zero tree coding. CICC 1999: 65-68 - [c24]Lode Nachtergaele, Bart Vanhoof, Mercedes Peón, Gauthier Lafruit, Jan Bormans, Ivo Bolsens:
Implementation of a Scalable MPEG-4 Wavelet-Based Visual Texture Compression System. DAC 1999: 333-336 - [c23]Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels, Ivo Bolsens:
Hardware Reuse at the Behavioral Level. DAC 1999: 784-789 - [c22]Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Ivo Bolsens:
A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement. DATE 1999: 271- - [c21]Piet Wambacq, Stéphane Donnay, Hocine Ziad, Marc Engels, Hugo De Man, Ivo Bolsens:
A Single-Package Solution for Wireless Transceivers. DATE 1999: 425- - [c20]Ivo Bolsens, Wojtek Maly, Ludo Deferm, Jo Borel, Harry J. M. Veendrick:
Single Chip or Hybrid System Integration. DATE 1999: 616- - [c19]Piet Wambacq, Gerd Vandersteen, Stéphane Donnay, Marc Engels, Ivo Bolsens, Erik Lauwers, Piet Vanassche, Georges G. E. Gielen:
High-level simulation and power modelling of mixed-signal front-ends for digital telecommunications. ICECS 1999: 525-528 - [c18]Stéphane Donnay, Marc van Heijningen, Mustafa Badaroglu, Wim Diels, Marc Engels, Ivo Bolsens, Yann A. Zinzius, Georges G. E. Gielen, Willy Sansen, Tony Fondén, Svante Signell:
BANDIT: embedding analog-to-digital converters on digital telecom ASICs. ICECS 1999: 1377-1380 - [c17]Bart Masschelein, Bart Vanhoof, Lode Nachtergaele, Jan Bormans, Ivo Bolsens:
Implementation driven selection of wavelet filters for still image coding based on bitrange expansion. MMSP 1999: 371-376 - 1998
- [j7]Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens:
Low Power Digital Frequency Conversion Architectures. J. VLSI Signal Process. 18(2): 187-197 (1998) - [c16]Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens:
A Programming Environment for the Design of Complex High Speed ASICs. DAC 1998: 315-320 - [c15]Patrick Schaumont, Geert Vanmeerbeeck, E. Watzeels, Serge Vernalde, Marc Engels, Ivo Bolsens:
A Technique for Combined Virtual Prototyping and Hardware Design. International Workshop on Rapid System Prototyping 1998: 156-161 - 1997
- [j6]Ivo Bolsens, Marco Cecchini:
IP-based business conflicts. IEEE Des. Test Comput. 14(2): 4, 92 (1997) - [j5]Ivo Bolsens, Hugo J. De Man, Bill Lin, Karl van Rompaey, Steven Vercauteren, Diederik Verkest:
Hardware/software co-design of digital telecommunication systems. Proc. IEEE 85(3): 391-418 (1997) - [j4]Patrick Schaumont, Bart Vanthournout, Ivo Bolsens, Hugo De Man:
Synthesis of pipelined DSP accelerators with dynamic scheduling. IEEE Trans. Very Large Scale Integr. Syst. 5(1): 59-68 (1997) - [c14]Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens:
Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications. ED&TC 1997: 542-546 - 1996
- [j3]Diederik Verkest, Karl van Rompaey, Ivo Bolsens, Hugo De Man:
CoWare - A design environment for heterogeneous hardware/software systems. Des. Autom. Embed. Syst. 1(4): 357-386 (1996) - [c13]Elisabeth Berrebi, Polen Kission, Serge Vernalde, S. De Troch, Jean-Claude Herluison, Jean Fréhel, Ahmed Amine Jerraya, Ivo Bolsens:
Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis. DAC 1996: 573-578 - [c12]Karl van Rompaey, Ivo Bolsens, Hugo De Man, Diederik Verkest:
CoWare - a design environment for heterogenous hardware/software systems. EURO-DAC 1996: 252-257 - [c11]Jan Bormans, Serge Vernalde, Jan Cornelis, Ivo Bolsens, Hugo De Man:
A Hilbert fractal codec for region oriented compression of color images. ICECS 1996: 41-44 - [c10]S. Samel, Bert Gyselinckx, Ivo Bolsens, Hugo De Man:
Designing Systems On Silicon: A Digital Spread Spectrum Pager. VLSI Design 1996: 311-312 - 1995
- [c9]Zohair Sahraoui, Paul Six, Ivo Bolsens, Hugo De Man:
Search space reduction through clustering in test generation. EURO-DAC 1995: 242-247 - [c8]Patrick Schaumont, Bart Vanthournout, Ivo Bolsens, Hugo De Man:
Synthesis of pipelined DSP accelerators with dynamic scheduling. ISSS 1995: 72-77 - 1994
- [c7]Koen Van Nieuwenhove, Kjell Cools, D. Devisch, Ivo Bolsens, Serge Vernalde, Kim Chansik, R. B. W. Lee, Oh Younguk:
ASIC synthesis of a flexible 80 Mbit/s Reed-Solomon Codec. EURO-DAC 1994: 658-663 - [c6]Gert Goossens, Ivo Bolsens, Bill Lin, Francky Catthoor:
Design of heterogeneous ICs for mobile and personal communication systems. ICCAD 1994: 524-531 - 1993
- [b1]Jan Vanhoof, Karl van Rompaey, Ivo Bolsens, Gert Goossens, Hugo De Man:
High-level synthesis for real-time digital signal processing. The Kluwer international series in engineering and computer science 216, Kluwer 1993, ISBN 978-0-7923-9313-9, pp. I-VIII, 1-302 - [j2]A. K. Betts, Ivo Bolsens, Etienne Sicard, Marc Renaudin, Adrian Johnstone:
SMILE: A scalable microcontroller library element. Microprocess. Microprogramming 39(2-5): 259-262 (1993) - 1992
- [c5]Karl van Rompaey, Ivo Bolsens, Hugo De Man:
Just in Time Scheduling. ICCD 1992: 295-300 - [c4]Evagelos Katsadas, Zohair Sahraoui, Maryse Wouters, Veerle Derudder, Ivo Bolsens, Paul Six, Hugo De Man:
Regular Module Generation or Standard Cells: Two Alternative Implementations of a Library of Functional Building Blocks. Synthesis for Control Dominated Circuits 1992: 167-181 - 1991
- [c3]Jan Vanhoof, Ivo Bolsens, Hugo De Man:
Compiling Multi-Dimensional Data Streams into Distributed DSP ASIC Memory. ICCAD 1991: 272-275 - 1990
- [c2]W. De Rammelaere, Ivo Bolsens, Luc J. M. Claesen, Hugo De Man:
Derivation of signal flow direction in MOS VLSI: an alternative. ICCD 1990: 206-209
1980 – 1989
- 1989
- [c1]Ivo Bolsens, W. De Rammelaere, Luc J. M. Claesen, Hugo De Man:
Electrical Debugging of Synchronous MOS VLSI Circuits Exploiting Analysis of the Intended Logic Behaviour. DAC 1989: 513-518 - 1985
- [j1]Hugo De Man, Ivo Bolsens, E. Vanden Meersch, Johan Van Cleynenbreugel:
DIALOG: An Expert Debugging System for MOSVLSI Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 4(3): 303-311 (1985)
Coauthor Index
aka: Hugo J. De Man
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