Table of Contents
1 Overview ................................................................................................................................... 6
1.1 In-band Control and Status Signaling ............................................................................... 10
1.1.1 Auto-neg Mechanism ................................................................................................. 10
1.1.2 Auto-negotiation Message ......................................................................................... 11
1.1.3 Packet Control Header ............................................................................................... 14
2 Implementation Specification .................................................................................................. 17
2.1 XGMII Mapping ............................................................................................................... 19
2.2 GMII Mapping .................................................................................................................. 19
2.3 MII Mapping ..................................................................................................................... 19
2.4 Pause Frame Support ........................................................................................................ 19
2.5 Auto-neg Mechanism ........................................................................................................ 19
2.5.1 Transmitting Configuration Words ............................................................................ 20
2.6 Rate Adaptation - Replicating Transmit Bytes ................................................................. 21
2.6.1 4x2.5G Tx Mode (10G MAC/PHY Interface) ........................................................... 21
2.6.2 4x2.5G Sampling Received Bytes (Rx) ..................................................................... 24
2.6.3 2x5G Tx Mode ........................................................................................................... 26
2.6.4 Rx 2x5G Sampling Received Bytes ........................................................................... 27
2.7 Multiple Network Port over Single SERDES ................................................................... 28
2.7.1 Network Port Muxing ................................................................................................ 28
2.7.2 Tx Mux – Alignment Markers in non-FEC mode ...................................................... 31
2.7.3 Rx Demux in non-FEC mode ..................................................................................... 31
2.7.4 Tx Muxing in FEC mode ........................................................................................... 32
2.7.5 Rx Demux in FEC mode ............................................................................................ 33
2.7.6 Port De-Mux Framing ................................................................................................ 33
2.7.7 Clocking ..................................................................................................................... 33
2.7.8 Hardware Auto-negotiation Programming Sequence ................................................. 34
2.7.9 Port ASIC Software Controlled Negotiation Programming Sequence ....................... 34
2.8 USXGMII Packet Control Header Implementation .......................................................... 36
2.9 PHY Implementation ........................................................................................................ 41
2.9.1 Rx PHY Block ........................................................................................................... 41
2.9.2 Tx PHY Block ............................................................................................................ 42
2.9.3 MDI: Tx IPG and Pre-amble Processing on MDI ...................................................... 43
2.10 Electrical Specification .................................................................................................. 44
3 Appendix ................................................................................................................................. 45
