tms320f2812.资源-CSDN文库

需积分: 10 121 浏览量 2015-07-16 01:24:32 上传评论收藏 1.67MB PDF 举报

### TMS320F281x与TMS320C281x系列数字信号处理器(DSP)知识点解析 #### 一、产品概述 TMS320F281x 和 TMS320C281x 系列数字信号处理器(DSP)是由德州仪器(TI)生产的专业级DSP芯片。该系列DSP主要用于控制领域，例如电机控制、电源转换等工业应用。这些处理器具有高性能和低功耗的特点，并且集成了多种外设，以便于实现复杂的控制算法。 #### 二、主要特性 - **高处理性能**：采用高性能的C28x内核，支持单周期乘加运算，提高了计算效率。 - **存储器配置**：包括高速SARAM、Boot ROM（仅限C281x系列）、闪存（仅限F281x系列）等。 - **丰富的外设接口**：提供了多种串行通信接口、通用输入输出端口(GPIO)、定时器等。 - **实时调试与分析功能**：支持JTAG接口进行实时调试，方便开发和调试过程。 - **低功耗模式**：支持多种低功耗模式，有助于延长设备工作时间或减少能耗。 - **外部接口**：F2812型号支持外部接口(XINTF)，用于扩展外部存储器或外设。 - **安全机制**：提供安全保护功能，防止未经授权的访问。 #### 三、开始使用指南 1. **开发环境搭建**：选择合适的IDE(Integrated Development Environment)工具，如TI提供的Code Composer Studio。 2. **硬件设计**：根据具体的应用需求设计硬件电路板，注意合理布局DSP芯片及外围器件。 3. **软件编程**：利用C/C++等语言编写控制算法，并通过JTAG接口将程序下载到DSP中进行测试。 4. **调试与优化**：在开发过程中不断调试代码，优化性能。 #### 四、详细介绍 - **2.1 描述** - TMS320F281x 和 TMS320C281x 系列DSP是专为控制应用而设计的高度集成的处理器。 - 支持高性能的实时信号处理任务，适用于各种复杂的控制算法。 - **2.2 设备概览** - TMS320F281x 和 TMS320C281x 系列DSP提供多种封装选项，如GHH/ZHH、PGF、PBK等。 - 每个型号都有不同的特性组合，以满足不同应用的需求。 - **2.3 引脚分配** - 不同封装的DSP具有不同的引脚排列方式。 - GHH/ZHH封装适用于对空间有较高要求的应用场景。 - PGF和PBK封装则适用于更广泛的工业应用场景。 - **2.4 信号描述** - 详细介绍了各个引脚的功能，如时钟输入、电源、复位等。 - 提供了引脚电平、信号类型等关键参数的信息。 - **3.1 内存映射** - 定义了内存的布局，包括各种存储器区域的地址范围。 - 包括SARAM、Flash、ROM等不同类型存储器的空间划分。 - **3.2 简要描述** - **C28x CPU**：核心处理器单元，负责执行指令集。 - **哈佛总线架构**：支持独立的数据和指令总线，提高数据吞吐量。 - **外设总线**：连接内部外设，便于数据交换。 - **实时JTAG和分析**：提供实时调试接口，支持在线编程和调试。 - **外部接口(XINTF)**：仅F2812型号支持，用于扩展外部存储器或外设。 - **闪存(F281x Only)**：用于存储程序代码和数据。 - **ROM(C281x Only)**：包含引导程序和部分系统库函数。 - **M0/M1 SARAMs**：高速静态随机存取存储器，用于存储程序和数据。 - **L0/L1/H0 SARAMs**：高速缓存存储器，用于提高访问速度。 - **Boot ROM**：包含启动程序，引导系统进入正常运行状态。 - **安全机制**：提供加密和访问控制功能，保护敏感信息。 - **PIE块**：中断扩展块，增加了中断数量。 - **外部中断**：支持外部触发的中断事件。 - **振荡器和PLL**：提供时钟源，并可通过PLL倍频以获得更高频率。 - **看门狗**：监测系统运行状态，防止程序跑飞。 - **外围时钟管理**：管理和配置外设时钟。 - **低功耗模式**：支持休眠和待机模式，降低功耗。 - **外围帧(PFn)**：定义了外设的组织结构。 - **GPIO复用器**：允许某些引脚具有多种功能。 - **32位CPU定时器**：提供计数和定时功能。 - **控制外设**：包括ADC、PWM等控制模块。 - **串行端口外设**：支持SPI、SCI等多种串行通信协议。 - **3.3 寄存器映射** - 描述了各种寄存器的位置和用途，便于软件控制硬件。 - **3.4 设备仿真寄存器** - 用于配置JTAG接口，支持仿真和调试。 - **3.5 外部接口(XINTF)** - 对于F2812型号，提供了详细的外部接口配置方法。 - **3.6 中断** - 介绍了中断请求的处理机制，以及如何配置中断优先级。 - **3.7 系统控制** - 包括电源管理、时钟配置等功能。 - **3.8 振荡器和PLL模块** - 提供了时钟源的选择和配置方法。 - **3.9 PLL基时钟模块** - 详细解释了PLL的工作原理及其配置方法。 - **3.10 外部参考振荡器时钟选项** - 支持使用外部晶振作为时钟源。 - **3.11 看门狗模块** - 介绍了看门狗的工作原理及其配置方法。 - **3.12 低功耗模式模块** - 详细描述了各种低功耗模式的特性和配置方法。 #### 五、结论 TMS320F281x 和 TMS320C281x 系列DSP是专为复杂控制系统设计的高性能处理器，集成了多种高级特性，能够满足现代工业控制系统的高要求。开发者可以根据具体的应用需求选择合适的型号，并利用其丰富的资源和工具进行高效开发。

资源推荐

资源详情

资源评论

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

Digital Signal Processors

Data Manual

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Literature Number: SPRS174T

April 2001–Revised May 2012

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

www.ti.com

SPRS174T –APRIL 2001–REVISED MAY 2012

Contents

1 TMS320F281x, TMS320C281x DSPs ..................................................................................... 10

1.1 Features .................................................................................................................... 10

1.2 Getting Started ............................................................................................................. 11

2 Introduction ...................................................................................................................... 12

2.1 Description ................................................................................................................. 12

2.2 Device Summary .......................................................................................................... 13

2.3 Pin Assignments ........................................................................................................... 14

2.3.1 Terminal Assignments for the GHH/ZHH Packages ....................................................... 14

2.3.2 Pin Assignments for the PGF Package ...................................................................... 15

2.3.3 Pin Assignments for the PBK Package ...................................................................... 16

2.4 Signal Descriptions ........................................................................................................ 17

3 Functional Overview .......................................................................................................... 26

3.1 Memory Map ............................................................................................................... 27

3.2 Brief Descriptions .......................................................................................................... 32

3.2.1 C28x CPU ....................................................................................................... 32

3.2.2 Memory Bus (Harvard Bus Architecture) .................................................................... 32

3.2.3 Peripheral Bus .................................................................................................. 32

3.2.4 Real-Time JTAG and Analysis ................................................................................ 33

3.2.5 External Interface (XINTF) (2812 Only) ...................................................................... 33

3.2.6 Flash (F281x Only) ............................................................................................. 33

3.2.7 ROM (C281x Only) ............................................................................................. 33

3.2.8 M0, M1 SARAMs ............................................................................................... 34

3.2.9 L0, L1, H0 SARAMs ............................................................................................ 34

3.2.10 Boot ROM ....................................................................................................... 34

3.2.11 Security .......................................................................................................... 34

3.2.12 Peripheral Interrupt Expansion (PIE) Block ................................................................. 36

3.2.13 External Interrupts (XINT1, XINT2, XINT13, XNMI) ........................................................ 36

3.2.14 Oscillator and PLL .............................................................................................. 36

3.2.15 Watchdog ........................................................................................................ 36

3.2.16 Peripheral Clocking ............................................................................................. 36

3.2.17 Low-Power Modes .............................................................................................. 36

3.2.18 Peripheral Frames 0, 1, 2 (PFn) .............................................................................. 37

3.2.19 General-Purpose Input/Output (GPIO) Multiplexer ......................................................... 37

3.2.20 32-Bit CPU-Timers (0, 1, 2) ................................................................................... 37

3.2.21 Control Peripherals ............................................................................................. 37

3.2.22 Serial Port Peripherals ......................................................................................... 38

3.3 Register Map ............................................................................................................... 39

3.4 Device Emulation Registers .............................................................................................. 41

3.5 External Interface, XINTF (2812 Only) ................................................................................. 42

3.5.1 Timing Registers ................................................................................................ 43

3.5.2 XREVISION Register ........................................................................................... 43

3.6 Interrupts .................................................................................................................... 44

3.6.1 External Interrupts .............................................................................................. 47

3.7 System Control ............................................................................................................ 48

3.8 OSC and PLL Block ....................................................................................................... 50

3.8.1 Loss of Input Clock ............................................................................................. 51

3.9 PLL-Based Clock Module ................................................................................................ 52

3.10 External Reference Oscillator Clock Option ........................................................................... 52

3.11 Watchdog Block ........................................................................................................... 53

3.12 Low-Power Modes Block ................................................................................................. 54

4 Peripherals ....................................................................................................................... 55

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

www.ti.com

SPRS174T –APRIL 2001–REVISED MAY 2012

4.1 32-Bit CPU-Timers 0/1/2 ................................................................................................. 55

4.2 Event Manager Modules (EVA, EVB) ................................................................................... 58

4.2.1 General-Purpose (GP) Timers ................................................................................ 61

4.2.2 Full-Compare Units ............................................................................................. 61

4.2.3 Programmable Deadband Generator ........................................................................ 61

4.2.4 PWM Waveform Generation .................................................................................. 61

4.2.5 Double Update PWM Mode ................................................................................... 61

4.2.6 PWM Characteristics ........................................................................................... 62

4.2.7 Capture Unit ..................................................................................................... 62

4.2.8 Quadrature-Encoder Pulse (QEP) Circuit ................................................................... 62

4.2.9 External ADC Start-of-Conversion ........................................................................... 62

4.3 Enhanced Analog-to-Digital Converter (ADC) Module ............................................................... 63

4.4 Enhanced Controller Area Network (eCAN) Module .................................................................. 68

4.5 Multichannel Buffered Serial Port (McBSP) Module .................................................................. 73

4.6 Serial Communications Interface (SCI) Module ....................................................................... 77

4.7 Serial Peripheral Interface (SPI) Module ............................................................................... 80

4.8 GPIO MUX ................................................................................................................. 83

5 Development Support ........................................................................................................ 86

5.1 Device and Development Support Tool Nomenclature ............................................................... 86

5.2 Documentation Support .................................................................................................. 87

5.3 Community Resources .................................................................................................... 89

6 Electrical Specifications ..................................................................................................... 91

6.1 Absolute Maximum Ratings .............................................................................................. 91

6.2 Recommended Operating Conditions .................................................................................. 91

6.3 Electrical Characteristics Over Recommended Operating Conditions (Unless Otherwise Noted) ............. 92

6.4 Current Consumption ..................................................................................................... 93

6.5 Current Consumption Graphs ............................................................................................ 95

6.6 Reducing Current Consumption ......................................................................................... 97

6.7 Emulator Connection Without Signal Buffering for the DSP ......................................................... 97

6.8 Power Sequencing Requirements ....................................................................................... 98

6.9 Signal Transition Levels ................................................................................................. 100

6.10 Timing Parameter Symbology .......................................................................................... 101

6.11 General Notes on Timing Parameters ................................................................................ 101

6.12 Test Load Circuit ......................................................................................................... 101

6.13 Device Clock Table ...................................................................................................... 102

6.14 Clock Requirements and Characteristics ............................................................................. 103

6.14.1 Input Clock Requirements ................................................................................... 103

6.14.2 Output Clock Characteristics ................................................................................ 104

6.15 Reset Timing ............................................................................................................. 104

6.16 Low-Power Mode Wakeup Timing ..................................................................................... 108

6.17 Event Manager Interface ................................................................................................ 112

6.17.1 PWM Timing ................................................................................................... 112

6.17.2 Interrupt Timing ................................................................................................ 114

6.18 General-Purpose Input/Output (GPIO) – Output Timing ............................................................ 115

6.19 General-Purpose Input/Output (GPIO) – Input Timing .............................................................. 116

6.20 Serial Peripheral Interface (SPI) Master Mode Timing .............................................................. 117

6.21 Serial Peripheral Interface (SPI) Slave Mode Timing ............................................................... 122

6.22 External Interface (XINTF) Timing ..................................................................................... 126

6.23 XINTF Signal Alignment to XCLKOUT ................................................................................ 130

6.24 External Interface Read Timing ........................................................................................ 131

6.25 External Interface Write Timing ........................................................................................ 133

6.26 External Interface Ready-on-Read Timing With One External Wait State ....................................... 134

6.27 External Interface Ready-on-Write Timing With One External Wait State ....................................... 137

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

SPRS174T –APRIL 2001–REVISED MAY 2012

www.ti.com

6.28 XHOLD and XHOLDA ................................................................................................... 140

6.29 XHOLD/XHOLDA Timing ............................................................................................... 141

6.30 On-Chip Analog-to-Digital Converter .................................................................................. 143

6.30.1 ADC Absolute Maximum Ratings ........................................................................... 143

6.30.2 ADC Electrical Characteristics Over Recommended Operating Conditions ........................... 144

6.30.3 Current Consumption for Different ADC Configurations ................................................. 145

6.30.4 ADC Power-Up Control Bit Timing .......................................................................... 146

6.30.5 Detailed Description .......................................................................................... 146

6.30.5.1 Reference Voltage ................................................................................ 146

6.30.5.2 Analog Inputs ..................................................................................... 146

6.30.5.3 Converter .......................................................................................... 146

6.30.5.4 Conversion Modes ............................................................................... 146

6.30.6 Sequential Sampling Mode (Single-Channel) (SMODE = 0) ............................................ 147

6.30.7 Simultaneous Sampling Mode (Dual-Channel) (SMODE = 1) .......................................... 148

6.30.8 Definitions of Specifications and Terminology ............................................................. 149

6.31 Multichannel Buffered Serial Port (McBSP) Timing ................................................................. 150

6.31.1 McBSP Transmit and Receive Timing ...................................................................... 150

6.31.2 McBSP as SPI Master or Slave Timing .................................................................... 153

6.32 Flash Timing (F281x Only) ............................................................................................. 157

6.33 ROM Timing (C281x only) .............................................................................................. 159

6.34 Migrating From F281x Devices to C281x Devices .................................................................. 160

7 Revision History .............................................................................................................. 161

8 Mechanical Data .............................................................................................................. 162

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

www.ti.com

SPRS174T –APRIL 2001–REVISED MAY 2012

List of Figures

2-1 TMS320F2812 and TMS320C2812 179-Ball GHH/ZHH MicroStar BGA™ (Bottom View)............................. 14

2-2 TMS320F2812 and TMS320C2812 176-Pin PGF LQFP (Top View) ..................................................... 15

2-3 TMS320F2810, TMS320F2811, TMS320C2810, and TMS320C2811 128-Pin PBK LQFP (Top View).............. 16

3-1 Functional Block Diagram ....................................................................................................... 27

3-2 F2812/C2812 Memory Map..................................................................................................... 28

3-3 F2811/C2811 Memory Map..................................................................................................... 29

3-4 F2810/C2810 Memory Map..................................................................................................... 29

3-5 External Interface Block Diagram .............................................................................................. 42

3-6 Interrupt Sources ................................................................................................................. 44

3-7 Multiplexing of Interrupts Using the PIE Block ............................................................................... 45

3-8 Clock and Reset Domains ...................................................................................................... 48

3-9 OSC and PLL Block.............................................................................................................. 50

3-10 Recommended Crystal/Clock Connection .................................................................................... 52

3-11 Watchdog Module ................................................................................................................ 53

4-1 CPU-Timers ....................................................................................................................... 55

4-2 CPU-Timer Interrupts Signals and Output Signal ............................................................................ 56

4-3 Event Manager A Functional Block Diagram ................................................................................. 61

4-4 Block Diagram of the F281x and C281x ADC Module ...................................................................... 64

4-5 ADC Pin Connections With Internal Reference .............................................................................. 65

4-6 ADC Pin Connections With External Reference ............................................................................. 66

4-7 eCAN Block Diagram and Interface Circuit ................................................................................... 69

4-8 eCAN Memory Map .............................................................................................................. 71

4-9 McBSP Module With FIFO ...................................................................................................... 74

4-10 Serial Communications Interface (SCI) Module Block Diagram............................................................ 79

4-11 Serial Peripheral Interface Module Block Diagram (Slave Mode).......................................................... 82

4-12 GPIO/Peripheral Pin Multiplexing .............................................................................................. 85

5-1 TMS320x281x Device Nomenclature.......................................................................................... 87

6-1 F2812/F2811/F2810 Typical Current Consumption Over Frequency ..................................................... 95

6-2 F2812/F2811/F2810 Typical Power Consumption Over Frequency....................................................... 96

6-3 C2812/C2811/C2810 Typical Current Consumption Over Frequency .................................................... 96

6-4 C2812/C2811/C2810 Typical Power Consumption Over Frequency...................................................... 97

6-5 Emulator Connection Without Signal Buffering for the DSP................................................................ 98

6-6 F2812/F2811/F2810 Typical Power-Up and Power-Down Sequence – Option 2 ....................................... 99

6-7 Output Levels.................................................................................................................... 100

6-8 Input Levels...................................................................................................................... 100

6-9 3.3-V Test Load Circuit......................................................................................................... 101

6-10 Clock Timing..................................................................................................................... 104

6-11 Power-on Reset in Microcomputer Mode (XMP/MC = 0) (See Note D) ................................................. 106

6-12 Power-on Reset in Microprocessor Mode (XMP/MC = 1) ................................................................. 107

6-13 Warm Reset in Microcomputer Mode ........................................................................................ 107

6-14 Effect of Writing Into PLLCR Register ....................................................................................... 107

6-15 IDLE Entry and Exit Timing.................................................................................................... 108

6-16 STANDBY Entry and Exit Timing............................................................................................. 110

6-17 HALT Wakeup Using XNMI ................................................................................................... 111

6-18 PWM Output Timing............................................................................................................ 112

6-19 TDIRx Timing.................................................................................................................... 113

6-20 EVASOC Timing ................................................................................................................ 113

剩余171页未读，继续阅读

评论收藏

内容反馈

cekong13

粉丝: 0
资源: 5

tms320f2812.

tms320f2812

tms320c2812.pdf

tms320f2812中文.pdf

tms320f2812.pdf

tms320f2812头文件

tms320f2812手册

adc.rar_adc tms320f2812_tms320f2812 adc

TMS320F2812.rar_F2812_F2812 schematic_TMS320F2812_Texas_The Sign

spwm.zip_spwm_spwm tms320f2812

tms320f2812官方中文手册datasheet.rar

TMS320F2812

TMS320F2812.DDB

TMS320F2812例程.rar

ucos_ii_tms320f2812

TMS320F2812 TMS320F2812 TMS320F2812 TMS320F2812

tms320f2812原理图

TMS320F2812.rar

TMS320F2812在电力系统多通道同步交流采样中的应用

TMs320f2812应用

TEMS320F2812板子 TMS320F2812

基于TMS320F2812 TMS320F28335 TI电子设计大奖赛论文+软件源码+硬件设计文件合集.zip

DSP中的分析TMS320F2812在柴油发电机组频率测量中的应用

DSP TMS320F2812

ASM.rar_TMS320F2812 .asm_dsp2812 a

DSP中的分析TMS320F2812在车辆四轮转向控制中的应用

《DSP原理及应用》课件 第2章 定点DSP芯片TMS320F2812.ppt

TI-TMS320F2812.rar_TI 算法_Ti官网

最新资源

《DSP原理及应用》课件第2章定点DSP芯片TMS320F2812.ppt