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Design for embedded image Processing on FPGAS
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Implementing an image processing algorithm (or indeed any algorithm) on an FPGA, therefore, consists of determining the underlying architecture of an algorithm, mapping that architecture onto the resources available within an FPGA and finally mapping the algorithm onto the hardware architecture. Unfortunately, there is very little material available to help those new to the area to get started. Even this insight into the process is not actually stated anywhere, although it is implicitly followed (whether consciously or not) by most people working in this area.
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DESIGN FOR EMBEDDED
IMAGE PROCESSING
ON FPGAS

DESIGN FOR EMBEDDED
IMAGE PROCESSING
ON FPGAS
Donald G. Bailey
Massey University, New Zealand

This edition first published 2011
Ó 2011 John Wiley & Sons (Asia) Pte Ltd
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John Wiley & Sons (Asia) Pte Ltd, 1 Fusionopolis Walk, #07-01 Solaris South Tower, Singapore 138628
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Publisher, John Wiley & Sons (Asia) Pte Ltd, 1 Fusionopolis Walk, #07-01 Solaris South Tower, Singapore 138628,
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Library of Congress Cataloging-in-Publication Data
Bailey, Donald G. (Donald Graeme), 1962-
Design for embedded image processing on FPGAs / Donald G. Bailey.
p. cm.
Includes bibliographical references and index.
ISBN 978-0-470-82849-6 (hardback)
1. Embedded computer systems. 2. Field programmable gate arrays. I. Title.
TK7895.E42B3264 2011
621.39’9 dc22 2011002991
Print ISBN: 978-0-470-82849-6
ePDF ISBN: 978-0-470-82850-2
oBook ISBN: 978-0-470-82851-9
ePub ISBN: 978-0-470-82852-6
Mobi ISBN: 978-1-118-07331-5
Set in 9/11 pt Times New Roman by Thomson Digital, Noida, India

Contents
Preface xi
Acknowledgements xvii
1 Image Processing 1
1.1 Basic Definitions 2
1.2 Image Formation 3
1.3 Image Processing Operations 7
1.4 Example Application 9
1.5 Real-Time Image Processing 11
1.6 Embedded Image Processing 12
1.7 Serial Processing 12
1.8 Parallelism 14
1.9 Hardware Image Processing Systems 18
2 Field Programmable Gate Arrays 21
2.1 Programmable Logic 21
2.1.1 FPGAs vs. ASICs 24
2.2 FPGAs and Image Processing 25
2.3 Inside an FPGA 26
2.3.1 Logic 27
2.3.2 Interconnect 28
2.3.3 Input and Output 29
2.3.4 Clocking 30
2.3.5 Configuration 31
2.3.6 Power Consumption 32
2.4 FPGA Families and Features 33
2.4.1 Xilinx 33
2.4.2 Altera 38
2.4.3 Lattice Semiconductor 44
2.4.4 Achronix 46
2.4.5 SiliconBlue 47
2.4.6 Tabula 47
2.4.7 Actel 48
2.4.8 Atmel 49
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