基于STM32 的门禁系统 door.zip

; generated by Component: ARM Compiler 5.05 update 1 (build 106) Tool: ArmCC [4d0efa] ; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o..\obj\stm32f10x_rcc.o --asm_dir=..\LIST\ --list_dir=..\LIST\ --depend=..\obj\stm32f10x_rcc.d --cpu=Cortex-M3 --apcs=interwork -O0 --diag_suppress=9931 -I..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I..\..\Libraries\CMSIS\CM3\CoreSupport -I..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I..\..\USER\INC -IC:\Users\lenovo\Desktop\项目工厂\door\Project\Pro\RTE -IF:\mdk\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Device\Include -IF:\mdk\ARM\CMSIS\Include -D__UVISION_VERSION=514 -DSTM32F10X_MD -DUSE_STDPERIPH_DRIVER --omf_browse=..\obj\stm32f10x_rcc.crf ..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c] THUMB AREA ||i.RCC_ADCCLKConfig||, CODE, READONLY, ALIGN=2 RCC_ADCCLKConfig PROC ;;;765 */ ;;;766 void RCC_ADCCLKConfig(uint32_t RCC_PCLK2) 000000 4601 MOV r1,r0 ;;;767 { ;;;768 uint32_t tmpreg = 0; 000002 2000 MOVS r0,#0 ;;;769 /* Check the parameters */ ;;;770 assert_param(IS_RCC_ADCCLK(RCC_PCLK2)); ;;;771 tmpreg = RCC->CFGR; 000004 4a03 LDR r2,|L1.20| 000006 6850 LDR r0,[r2,#4] ;;;772 /* Clear ADCPRE[1:0] bits */ ;;;773 tmpreg &= CFGR_ADCPRE_Reset_Mask; 000008 f4204040 BIC r0,r0,#0xc000 ;;;774 /* Set ADCPRE[1:0] bits according to RCC_PCLK2 value */ ;;;775 tmpreg |= RCC_PCLK2; 00000c 4308 ORRS r0,r0,r1 ;;;776 /* Store the new value */ ;;;777 RCC->CFGR = tmpreg; 00000e 6050 STR r0,[r2,#4] ;;;778 } 000010 4770 BX lr ;;;779 ENDP 000012 0000 DCW 0x0000 |L1.20| DCD 0x40021000 AREA ||i.RCC_AHBPeriphClockCmd||, CODE, READONLY, ALIGN=2 RCC_AHBPeriphClockCmd PROC ;;;1063 */ ;;;1064 void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState) 000000 b129 CBZ r1,|L2.14| ;;;1065 { ;;;1066 /* Check the parameters */ ;;;1067 assert_param(IS_RCC_AHB_PERIPH(RCC_AHBPeriph)); ;;;1068 assert_param(IS_FUNCTIONAL_STATE(NewState)); ;;;1069 ;;;1070 if (NewState != DISABLE) ;;;1071 { ;;;1072 RCC->AHBENR |= RCC_AHBPeriph; 000002 4a06 LDR r2,|L2.28| 000004 6952 LDR r2,[r2,#0x14] 000006 4302 ORRS r2,r2,r0 000008 4b04 LDR r3,|L2.28| 00000a 615a STR r2,[r3,#0x14] 00000c e004 B |L2.24| |L2.14| ;;;1073 } ;;;1074 else ;;;1075 { ;;;1076 RCC->AHBENR &= ~RCC_AHBPeriph; 00000e 4a03 LDR r2,|L2.28| 000010 6952 LDR r2,[r2,#0x14] 000012 4382 BICS r2,r2,r0 000014 4b01 LDR r3,|L2.28| 000016 615a STR r2,[r3,#0x14] |L2.24| ;;;1077 } ;;;1078 } 000018 4770 BX lr ;;;1079 ENDP 00001a 0000 DCW 0x0000 |L2.28| DCD 0x40021000 AREA ||i.RCC_APB1PeriphClockCmd||, CODE, READONLY, ALIGN=2 RCC_APB1PeriphClockCmd PROC ;;;1125 */ ;;;1126 void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) 000000 b129 CBZ r1,|L3.14| ;;;1127 { ;;;1128 /* Check the parameters */ ;;;1129 assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph)); ;;;1130 assert_param(IS_FUNCTIONAL_STATE(NewState)); ;;;1131 if (NewState != DISABLE) ;;;1132 { ;;;1133 RCC->APB1ENR |= RCC_APB1Periph; 000002 4a06 LDR r2,|L3.28| 000004 69d2 LDR r2,[r2,#0x1c] 000006 4302 ORRS r2,r2,r0 000008 4b04 LDR r3,|L3.28| 00000a 61da STR r2,[r3,#0x1c] 00000c e004 B |L3.24| |L3.14| ;;;1134 } ;;;1135 else ;;;1136 { ;;;1137 RCC->APB1ENR &= ~RCC_APB1Periph; 00000e 4a03 LDR r2,|L3.28| 000010 69d2 LDR r2,[r2,#0x1c] 000012 4382 BICS r2,r2,r0 000014 4b01 LDR r3,|L3.28| 000016 61da STR r2,[r3,#0x1c] |L3.24| ;;;1138 } ;;;1139 } 000018 4770 BX lr ;;;1140 ENDP 00001a 0000 DCW 0x0000 |L3.28| DCD 0x40021000 AREA ||i.RCC_APB1PeriphResetCmd||, CODE, READONLY, ALIGN=2 RCC_APB1PeriphResetCmd PROC ;;;1215 */ ;;;1216 void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) 000000 b129 CBZ r1,|L4.14| ;;;1217 { ;;;1218 /* Check the parameters */ ;;;1219 assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph)); ;;;1220 assert_param(IS_FUNCTIONAL_STATE(NewState)); ;;;1221 if (NewState != DISABLE) ;;;1222 { ;;;1223 RCC->APB1RSTR |= RCC_APB1Periph; 000002 4a06 LDR r2,|L4.28| 000004 6912 LDR r2,[r2,#0x10] 000006 4302 ORRS r2,r2,r0 000008 4b04 LDR r3,|L4.28| 00000a 611a STR r2,[r3,#0x10] 00000c e004 B |L4.24| |L4.14| ;;;1224 } ;;;1225 else ;;;1226 { ;;;1227 RCC->APB1RSTR &= ~RCC_APB1Periph; 00000e 4a03 LDR r2,|L4.28| 000010 6912 LDR r2,[r2,#0x10] 000012 4382 BICS r2,r2,r0 000014 4b01 LDR r3,|L4.28| 000016 611a STR r2,[r3,#0x10] |L4.24| ;;;1228 } ;;;1229 } 000018 4770 BX lr ;;;1230 ENDP 00001a 0000 DCW 0x0000 |L4.28| DCD 0x40021000 AREA ||i.RCC_APB2PeriphClockCmd||, CODE, READONLY, ALIGN=2 RCC_APB2PeriphClockCmd PROC ;;;1094 */ ;;;1095 void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) 000000 b129 CBZ r1,|L5.14| ;;;1096 { ;;;1097 /* Check the parameters */ ;;;1098 assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph)); ;;;1099 assert_param(IS_FUNCTIONAL_STATE(NewState)); ;;;1100 if (NewState != DISABLE) ;;;1101 { ;;;1102 RCC->APB2ENR |= RCC_APB2Periph; 000002 4a06 LDR r2,|L5.28| 000004 6992 LDR r2,[r2,#0x18] 000006 4302 ORRS r2,r2,r0 000008 4b04 LDR r3,|L5.28| 00000a 619a STR r2,[r3,#0x18] 00000c e004 B |L5.24| |L5.14| ;;;1103 } ;;;1104 else ;;;1105 { ;;;1106 RCC->APB2ENR &= ~RCC_APB2Periph; 00000e 4a03 LDR r2,|L5.28| 000010 6992 LDR r2,[r2,#0x18] 000012 4382 BICS r2,r2,r0 000014 4b01 LDR r3,|L5.28| 000016 619a STR r2,[r3,#0x18] |L5.24| ;;;1107 } ;;;1108 } 000018 4770 BX lr ;;;1109 ENDP 00001a 0000 DCW 0x0000 |L5.28| DCD 0x40021000 AREA ||i.RCC_APB2PeriphResetCmd||, CODE, READONLY, ALIGN=2 RCC_APB2PeriphResetCmd PROC ;;;1184 */