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IMX571BQR-C_Data_Sheet.pdf
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2019-12-11
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IMX571是APS-C画幅传感器,规格是26MP@16FPS,用了SI、8通道SLVS-EC,SLVS-EC是Scalable Low Voltage Signaling Embedded Clock的简写,是索尼今年开发串行总线,每一个通道拥有独立的时针,单个通道带宽为2.3Gbps,远高于MIPI的1.44Gbps或是Sub LVDS的0.576Gbps。中高端APS-C相机会使用IMX571.
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Copyright 2018 Sony Semiconductor Solutions Corporation
1
Diagonal 28.3 mm (Type 1.8
) CMOS Image Sensor with Square Pixel for Color
Cameras
IMX571BQR-C
Description
The IMX571BQR-C is a diagonal 28.3 mm (Type 1.8) CMOS active pixel type image sensor with a square pixel array
and 26.11 M effective pixels. This sensor incorporates maximum 36 dB PGA circuit and 16-bit A/D converter. 16-bit
digital output makes it possible to readout the signals of 26.11 M effective pixels at high-speed of 6.84 frame/s in still
picture mode. In addition, it realizes 12-bit digital output for high-speed 4K moving picture by window readout mode.
This sensor is designed for use in consumer use digital still camera. When using this for another application, Sony
Semiconductor Solutions Corporation does not guarantee the quality and reliability of this product. Therefore, don’t
use this for applications other than consumer use digital still camera.
In addition, individual specification change cannot be supported because this is a standard product.
Consult your Sony Semiconductor Solutions Corporation sales representative if you have any questions.
Features
◆ APS size CMOS active pixel type dots
◆ Input clock frequency 72 MHz
◆ All-pixel readout mode
All-pixel readout mode / 2-parallel ADC readout
All-pixel readout mode / digital overlap drive
Vertical 2/2-line and horizontal 2/2-line weighted binning readout mode
Vertical 1/3 subsampling, horizontal 3 weighted binning readout mode
Vertical 3/3-line binning, horizontal 3 weighted binning readout mode
Vertical 1/3 subsampling, horizontal 3 weighted binning readout mode / digital overlap drive
Vertical 3/3-line binning, horizontal 3 weighted binning readout mode / digital overlap drive
Vertical 1/5 subsampling, horizontal 3 weighted binning readout mode
Vertical 3/5 subsampling binning, horizontal 3 weighted binning readout mode
Vertical 1/7 subsampling, horizontal 3 weighted binning readout mode
Vertical 3/7 subsampling binning, horizontal 3 weighted binning readout mode
Vertical 1/9 subsampling, horizontal 3 weighted binning readout mode
Vertical 3/9 subsampling binning, horizontal 3 weighted binning readout mode
Vertical 1/13 subsampling, horizontal 3 weighted binning readout mode
Vertical 3/13 subsampling binning, horizontal 3 weighted binning readout mode
Vertical 1/25 subsampling, horizontal 3 weighted binning readout mode
Vertical 3/25 subsampling binning, horizontal 3 weighted binning readout mode
◆ Rolling shutter function moving picture mode
◆ H driver, V driver and serial communication circuit on chip
◆ +36dB gain in CDS/PGA on chip (when A/D 16-bit, 14-bit, 12-bit)
◆ Built-in 11-bit/12-bit/14-bit/16-bit A/D converter
◆ 8 Lane SLVS-EC output
◆ R, G, B primary color mosaic filter on chip
◆ Back-illuminated type
Sony Semiconductor Solutions Corporation reserves the right to change products and specifications without prior notice.
This information does not convey any license by any implication or otherwise under any patents or other right.
Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony Semiconductor Solutions
Corporation cannot assume responsibility for any problems arising out of the use of these circuits.
E18Z05B97
CONFIDENTIAL
IMX571BQR-C
2
Device Structure
◆ CMOS image sensor
◆ Image size Diagonal 28.3 mm (Type 1.8)
◆ Total number of pixels 6280 (H) × 4264 (V) approx. 26.78 M pixels
◆ Number of effective pixels 6252 (H) × 4176 (V) approx. 26.11 M pixels
◆ Number of active pixels 6244 (H) × 4168 (V) approx. 26.02 M pixels
◆ Chip size 27.780 mm (H) × 22.302 mm (V)
◆ Unit cell size 3.76 μm (H) × 3.76 μm (V)
◆ Optical black Horizontal (H) direction: Front 16 pixels, Rear 0 pixel
Vertical (V) direction: Front 22 pixels, Rear 0 pixel
◆ Substrate material Silicon
CONFIDENTIAL
IMX571BQR-C
3
Physical Pixel Array and Pixel Address Definition
4
Sunspot black dummy lines (Not Read)
4 White dummy lines (Not Read)
28 Dummy access lines (Not Read)
2 Overflow drain pixels (Not Read)
4201
R
1 Ignored VOB area with sensor
Gr
Gb B
Gb B
4168 Active pixels
4264
6 2 6244 2 2
R Gr
Gb B
R Gr
24
Gb
1 Ignored VOB area with sensor
B
2 Overflow drain pixels (Not Read)
10 Dummy access lines (Not Read)
23
R
1 Ignored VOB area with sensor
Gb
22 VOB area with sensor
R
0
Gb
1 Ignored VOB area with sensor
R
12 OB area without sensor
Gb
0
23
24
6275
6276
6279
6280
16
4
4
4
Effective pixels
Dummy
(Not Read)
Dummy
(Not Read)
4
Effective pixels
HOB area with sensor
Ignored HOB area with sensor
Overflow drain pixels
Effective pixels
Effective pixels
Overflow drain pixels (Not Read)
Dummy (Not Read)
・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・
Pixel
address in
vertical
direction
・・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・
・
Pixel
address in
horizontal
direction
Readable
by register
setting
Fig. Physical Pixel Array and Pixel Address Definition (Top View)
CONFIDENTIAL
IMX571BQR-C
4
Absolute Maximum Ratings
Item Symbol Ratings Unit Remarks
Supply voltage
V
DD
SUB, V
DD
HPX, V
DD
HVD V
SS
HPX -0.5 to 6.3 V —
V
DD
HVS V
SS
HPX -0.5 to 6.3 V —
V
DD
MPX V
SS
HPX -0.3 to 2.5 V
—
V
DD
LPLA V
SS
LPLA -0.3 to 2.0 V —
V
DD
LPLD V
SS
LPLD -0.3 to 2.0 V —
V
DD
HCM V
SS
HCM -0.5 to 6.3 V
—
V
DD
HDA V
SS
HDA -0.5 to 6.3 V —
V
DD
HAN V
SS
HAN -0.5 to 6.3 V —
V
DD
LCB V
SS
LCB -0.3 to 2.0 V
—
V
DD
LCN V
SS
LCN -0.3 to 2.0 V —
V
DD
MIO V
SS
LSC -0.3 to 2.5 V —
V
DD
LSC V
SS
LSC -0.3 to 2.0 V
—
V
DD
LIF V
SS
LIF -0.3 to 2.0 V —
VRLT V
DD
HVS -6.3 to V
SS
HPX + 0.5 V —
VRLS V
DD
HVS -6.3 to V
SS
HPX + 0.5 V
—
VRM V
SS
HPX -0.5 to 6.3 V —
VRML V
DD
HVS -6.3 to V
SS
HPX + 0.5 V —
Input voltage
(digital)
INCK V
SS
LPLD -0.3 to V
DD
MIO + 0.3 V
—
XCLR, XVS, XHS, XPI,
SCK, SDI, XCE
V
SS
LSC -0.3 to V
DD
MIO + 0.3 V —
Output voltage
(digital)
SDO V
SS
LSC -0.3 to V
DD
MIO + 0.3 V —
DOP0 to DOP7, DOM0 to DOM7 V
SS
LIF -0.3 to V
DD
LIF + 0.3 V
SLVS-EC
Analog
TAMON1, TAMON2,
TAMON3, TAMON4,
VLOADLM1, VLOADLM2
VLOADCMSF1, VLOADCMSF2
V
SS
HPX -0.3 to V
DD
HPX + 0.3 V —
BIASRESBC1, BIASRESBC2,
VBGR1, VBGR2
V
SS
HAN -0.3 to V
DD
HAN + 0.3 V —
VLOADCM1, VLOADCM2, V
SS
HCM -0.3 to V
DD
HCM + 0.3 V —
Guaranteed operating temperature –10 to +75 ˚C —
Storage guarantee temperature
–30 to +80
˚C —
Performance guarantee temperature
–10 to +60
˚C
—
CONFIDENTIAL
IMX571BQR-C
5
Recommended Operating Conditions
Item
Symbol
Value
Unit
Remarks
Supply
voltage
V
DD
SUB
4.5
V
Substrate potential
V
DD
HPX
4.6
V
Pixel power supply
1.8 V
Pixel power supply only when using sleep setting
during long time exposure mode
V
SS
HPX
0.0
V
Pixel GND
V
DD
HVD
4.6
V
Pixel power supply
V
DD
HVS
4.25
V
Positive power supply for pixel drive
V
DD
MPX
1.8
V
Pixel power supply (for long time storage)
V
DD
LPLA
1.2
V
PLL power supply (Analog)
V
SS
LPLA
0.0
V
PLL GND (Analog)
V
DD
LPLD
1.2
V
PLL power supply (Logic)
V
SS
LPLD
0.0
V
PLL GND (Logic)
V
DD
HCM
4.0
V
Comparator power supply
V
SS
HCM
0.0
V
Comparator GND
V
DD
HDA
4.2
V
DAC power supply
V
SS
HDA
0.0
V
DAC GND
V
DD
HAN
4.5
V
DAC power supply
V
SS
HAN
0.0
V
DAC GND
V
DD
LCB
1.2
V
Comparator buffer power supply
V
SS
LCB
0.0
V
Comparator buffer GND
V
DD
LCN
1.2
V
Counter power supply
V
SS
LCN
0.0
V
Counter GND
V
DD
MIO
1.8
V
Digital I/O power supply
V
DD
LSC
1.2
V
Digital power supply
V
SS
LSC
0.0
V
Digital I/O GND
V
DD
LIF
1.2
V
SLVS-EC power supply
V
SS
LIF
0.0
V
SLVS-EC GND
VRLT
-1.2
V
Negative power supply for pixel drive
VRLS
-1.2
V
Negative power supply for pixel drive
VRM
2.2
V
Middle voltage supply for pixel drive
VRML
0.0
V
Middle voltage supply for pixel drive
CONFIDENTIAL
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