Cellular SoC Frontend STA Engineer (m/f/d)
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In this role, you will be a key part of the Cellular SoC Integration team in Munich, Germany. As Frontend-STA engineer you are the focal point for constraints development as well as design- and timing analysis. Together with RTL designers, Physical designers, and other integration teams, you will work on very exciting designs and sophisticated technology nodes.
You will be responsible for constraint development, including deliveries for synthesis, PnR, and sign-off STA. You will work on partition- as well as SoC-level and verify the results post-synthesis for all STA modes.
In this role, you will be the link between digital design, mixed-signal design (.lib definition), and physical design. Your responsibility is to achieve sign-off quality of timing constraints, based on stakeholder requirements.
Further, you will closely collaborate with digital designers to understand the design intent and its clock structure to optimize power, performance, and area. With CAD and PD teams you will continuously improve development flows.
- Hands-on experience on multiple projects with constraint development, -analysis, and -debugging.
- Hands-on experience with industry-standard tools for STA, e.g. PrimeTime or Tempus.
- Proven understanding of hierarchical design approaches, top-down design, timing budgeting as well as timing and physical convergence.
- Proficient in day-to-day usage of scripting languages (TCL, Perl, Shell, Bash, Python), Linux, and revision control systems (e.g. PerForce)
- Very good experience with Verilog and the ability to analyze RTL/Netlist designs
- Good interpersonal and communication skills as well as the ability to find effective technical solutions between RTL-Design and Physical-Design teams
- English language proficiency is required for this position
- Bachelor's or Master's Degree in Electrical Engineering, Computer Science/Software Engineering, or equivalent is a requirement with some years of working experience or a PhD in a relevant field with some years of proven experience.
- Experience with SoC practices such as multiple voltage and clock domains, integration of mixed-signal IPs, and power optimizations would be a big plus.
- Experience with synthesis, logic equivalence, or ECO techniques would be a plus.
- Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.